Overall operating profitability rose to 21.4 per cent according to iSuppli in the fourth quarter of 2009, the highest level since the last quarter of 2000. Those working around the industry then will remember those heady days, which were quickly followed by a sudden post-Christmas hangover when purchasing managers staggered into their warehouses and wondered: “Cripes. Did we really order all this stuff?”

For those thinking that the world was only just beginning to move out of recession late last year, a lot of the recovery in profitability in chipmaking has come from very aggressive supply management, also known as not spending anything on stuff to make chips with. Major customers are now in the unusual position of not being able to name their price and it’s not going to get any easier for them any time soon even though the big chipmakers are now opening up their wallets to expand production capacity.

Even during the disastrous first quarter of 2009, prices did not fall as far as they used to — because the chipmakers did not allow inventory to build up in the way it did in 1995 or 2000.

President and CEO of iSuppli Derek Lidow also cited the increasing focus of chipmakers: “The semiconductor industry has almost completely eschewed the broad-line model that once was the hallmark of the largest players in the business. Instead, chipmakers now are concentrating on specific market segments, allowing them to focus on areas where they have pricing power and a competitive advantage. This has allowed them to improve profit margins and to cut overhead.”

That position echoes former Infineon president Wolfgang Ziebart at Electronica in 2006: “Before, size was very important. This is over.”

At the same panel session, Professor Hermann Simon of Simon-Kucher and Partners went a bit further by chiding the chip industry for being “stupid” by chasing market share.

Infineon’s board thanked Ziebart for his insight by firing him and then wound up shutting down Qimonda just months ahead of a pricing recovery that might have helped the German memory maker find a buyer as a going concern rather than a source of cheap production tools for Texas Instruments.

Now that the results are in for 2009, it’s possible to see what effect the semiconductor industry’s bungee recession (thanks to Future Horizons’ Malcolm Penn for the inspiration for the phrase) has had on the shift towards more advanced processes. What’s interesting about the first set of charts is that you’d hardly know the foundries practically turned their machines off for a couple of quarters.

Utilisation plunged to 30 per cent in the dark days of early 2009 before bouncing back to near capacity by the middle of the year. Had it not been for TSMC’s 40nm yield problems, the transition towards 40/45nm processes might have been a bit quicker. But the severity of the recession arguably gave the number-one foundry a bit of breathing space, arguably helped by the better yield on more expensive flip-chip packages that the 40G-process chips would typically go into.

But some big problems still face MEMS. It’s not as cheap to make as you’d expect and the one thing you’d expect manufacturers would have down to a fine art — integration with other microelectronics — is still not easy to do. It’s even hard to package the things. They often need to be carefully sealed using special caps to stop moisture disrupting their delicate inner workings.

The seven-strong team at Barcelona-based startup Baolab reckon they have an answer to at least some of these problems. Having already developed a novel type of MEMS structure — basically a floating bar in an electrostatic box — several years ago, the company was faced with the problem of making it commercially viable.

While people speculate on why Intel and TSMC have so far failed to get anyone into production with an Atom system-on-chip (SoC), the one company with a real reason for licensing the processor core finds its latest creation dangling off the end of a PCI Express bus provided by Intel’s Pine Trail chipset.

When Intel launched the first generation of Atom, it was a tiny sliver of silicon that relied entirely on other chips to control a PC. Although you pretty much had to buy the Atom with its support chips from Intel, nVidia encouraged PC makers to dispense with the standard chipset and replace it with the Ion and its built-in graphics.

With Pine Trail, Intel decided to move its own GPU and main memory controller into the Atom processor itself and sell a smaller peripheral controller ‘South Bridge’ device, leaving nVidia with far less scope to have an influence on what an Atom-based PC would look like inside.

Perhaps the best response is to come up with what is, at first glance, the most insane architecture I’ve ever seen. Even its creator concedes that your best bet is not to think to what’s going inside because it gets too hard to conceptualise. Even the tools that build the design on Tabula’s architecture don’t deal directly with what happens inside the device.

Tabula is president and CTO Steve Teig’s fifth startup. Two were in electronic design automation (EDA) — the most recent being Simplex Solutions, which sold to Cadence Design Systems — and two in biotechnology. Even he spent a while, after leaving Cadence in 2003, wondering whether starting an FPGA company was a wise move considering the trail of dead companies that has formed in the wake of Xilinx’ and Altera’s dominance of the market since the early 1990s.

The company’s CEO, Dennis Segers, was responsible for the Virtex architecture at Xilinx — the company’s top-selling family of FPGAs — and was the man venture capitalists hauled in whenever they had a potential investment in an FPGA startup to make. And those VCs have not been short of choice in the past decade. Neither have they done very well out of it. Segers didn’t rate any of them.

One issue that Hino covered was the impact that the I/O ring has on device scaling from 40nm to 28nm. Unless you stuff the device full of transistors the I/O ring on wirebond devices can quickly dominate the cost because the pads don't scale anywhere near as fast as SRAM cells and logic gates. Analogue also generally doesn't benefit that much from scaling, except in terms of switching speed.

Hino presented a chart that showed good scaling from 65nm to 40nm for a device with 20 million gates of logic and 15Mbit of SRAM plus some analogue. On a 65nm process, this measures 10.1mm on a side. On a 40nm process, the dimensions reduce to 7.3mm on a side, a reduction of 48 per cent. However, the increasing dominance of the I/O ring and the analogue means that the 28nm device sees a slightly smaller reduction in area: 41 per cent for a chip that is 5.6mm on a side.

To stop the I/O ring from being too much of a burden, Fujitsu and Toshiba are cutting the pad pitch from 25µm to 22.5µm for staggered pins. The single-row pitch will drop from 40µm to 35µm. As smaller devices on 40nm could benefit from a reduction in I/O pitch, the older process will, apparently, also have the smaller staggered-pin dimensions from the end of the year, when 28nm is supposed to go live. The single-row pitch on 40nm will remain unchanged, presumably on the assumption that if a device is only using a single row of pins around the edge, it's hardly going to be pad-limited.

Chiang pointed to the shift to immersion lithography — a choice that Intel delayed by a generation — and the use of a new low-k dielectric in the metal layers as the main culprits for the foundry’s problems. He claimed that defect density has reduced significantly since the middle of last year, when chairman Morris Chang decided to expand the team working on 40nm at TSMC.

Chiang said the move from 90nm to 65nm was comparatively simple and the relative cost quite low. “Moving to 45 and 40nm is a lot more challenging,” he said. “This is the first time we began to use 193nm immersion [lithography]. This means the photoresist during exposure is submerged in water and [presents] a very high potential defect [density].”

The low-k dielectric, with a dielectric constant 2.5, was also more fragile than its predecessor. It seems that 40nm was a partial rerun of the 130nm introduction when chipmakers discovered that soft dielectrics and packaging machinery are not the best of mates — the pressure needed to seal the package crushed the metal interconnect.

But there comes a point where the proprietary language becomes a problem to the customers because it makes it harder to use stuff that has been developed outside that environment. And the customers have to choose between migrating or sticking with what they know and reinventing stuff that they know exists elsewhere. If those customers migrate, then the dominant company loses the reason for holding on to that language - it becomes more of a millstone than an advantage.

In the case of custom and analogue design, the language in question is Cadence Design Systems’ Skill. It’s grown like topsy over the years to the point that even people who’ve worked at Cadence aren’t quite sure what’s in it. Those outside the company don’t stand a chance. But a scripting language like Skill is crucial not only to general custom layout, as it prevents analogue engineers from quietly going mad repeatedly drawing the same shapes over and over again. It also forms the basis of things like process design kits (PDKs) that the foundries provide, as it allows them to define how cells and components are laid out.

The analyst firm expects the top ten to increase their spending by 67 per cent in 2010, a bigger jump than that expected for the entire industry. That is also set for a sudden leap in spending, up by 51 per cent, but it’s an indicator of how the big fab owners are gradually pulling away from the rest of the pack in terms of fab spending. Only the biggest can afford to operator fabs while the rest are forced to rely increasingly on foundry production.

Taiwanese foundry TSMC’s estimated spend this year is expected to surge by almost 80 per cent, “spurred on by the challenge from the upstart GlobalFoundries”, writes IC Insights president Bill McClean.

UMC has increased its own outlay dramatically but is already a long way behind TSMC and won’t even match GlobalFoundries this year following the incorporation of Chartered Semiconductor Manufacturing into the Abu Dhabi-financed foundry.

TSMC may only be $200m behind Samsung’s $5bn in terms of 2010 spending. Intel is predicted to pay out around $4.9bn for fab equipment this year and is easily the most conservative spender. However, the company didn’t cut back heavily last year when everyone else was taking an axe to their capital-expenditure budget. The company has a lot of its 32nm capacity in place ready for the launch of the Westmere generation of processors. And there is no point in contributing to a glut of processors when supplies of everything else will be tight.

The top trio alone — Intel, Samsung and TSMC — will account for 38 per cent of all capital spending in the semiconductor business this year. And more than half of the outlay from the top ten, which will represent two-thirds of the total spend.

Although these numbers are big, they won’t have much of an effect on 2010 chip supplies, McClean said at the recent IC Insights seminar in London. Although fab owners are now more efficient at getting tools up and running on the clean-room floor, it still takes several quarters for them to be productive. And the fab-equipment makers have to be able to service the sudden leap in demand having slashed their workforce once again in a sudden semiconductor slump.

However, the big fab owners will have an advantage in ordering: they have cash in the bank. Smaller players, such as the cash-strapped Taiwanese DRAM makers, will probably find themselves at the back of the queue for kit as credit will be in short supply.

Xilinx has nominated Taiwanese foundry TSMC as one of the two suppliers it plans to use to make field-programmable gate arrays (FPGAs) on the upcoming 28nm process – which is expected to double density compared to the current 45/40nm-based parts.

Historically, Xilinx has used the world’s second largest foundry UMC as its silicon supplier. Although the FPGA maker has turned to a number of foundries since the 130nm generation, including IBM, Samsung and Toshiba, the company has up to now avoided using TSMC.

Chuck Tralka, senior director for product definition at Xilinx, said when the company looked at how it would move on from the 45nm generation, “we began a survey of process nodes. Originally, we looked at 32nm and then moving to 28nm.”

The company then decided to move straight to 28nm, opting for variants of a high-k, metal-gate process that trade some performance for lower static power consumption, which increases with the number of transistors on a die.

“As we looked out at the process vendors. We began with a survey of what we expect to become available from the various foundries. We began looking with an eye to managing the performance issues. We talked to each of the potential foundry partners,” said Tralka.

“We determined that TSMC and Samsung had the right technology available. We worked with TSMC two years ago and started running test vehicles and began aligning process parameters with internal simulations. We expect to have devices available by the end of the year.

“We are working with both partners: one of them is in the lead,” said Tralka, but declined to say which foundry is likely to have products ready first.

“Both processes are actually fairly similar. They are both high-k, metal-gate and they have similar power/performance characteristics. We work to try to align the processes as much as possible. There are some differences. The families will get tweaked as we prepare to map one for each process or another.”

“What we will be doing is mapping particular families into particular fabs. And aligning what we think are the best power-performance trade-offs.”

Tralka claimed the long-standing relationship between Altera and TSMC “is not that big a concern. It is something that we have thought about. But TSMC does a good job working closely with each of their partners without compromising the work of their partners.

“Our foundry has been a multi-foundry strategy. We are a larger company company and we need more capacity available to us. And our strategy has been to choose the best partners for each node rather than wedding ourselves to a single process partner,” Tralka explained. “It’s possible that we will make different choices in future generations.”

However, Infineon has not sold some of the soft assets, such as patents that were filed under the German chipmaker's stewardship. And the company seems to be following the Rodime plan to getting some of its investment back: sue the people still in the DRAM business for infringment. I assume it will stop short of getting into the sports-betting business. However, before it bought Littlewoods' betting operation, Rodime managed to extract a tidy sum in licensing fees from various big disk-drive makers after the Scottish company shut its own manufacturing plant.

Infineon said it filed a complaint with the US International Trade Commission against Elpida, pushing for an exclusion order that will prevent the Japanese memory maker from importing its memory devices into the US even though Infineon no longer sells anything that competes.

So far, the complaint hasn't received a docket number from the ITC, and the organisation has not said that it will investigate the complaint. Infineon has claimed Elpida infringed four of its patents when making the DRAMs it currently ships.

At the IP conference a couple of years ago, Mike McLean of technology-analyst Semiconductor Insights predicted a rise in complaints by companies armed with large patent portfolios. But acknowledged there are issues with suing competitors when the litigation may affect customers of both parties.

“The companies may not be the most popular in the world,” McLean noted. “Are you willing to license [patents] where there are pre-existing business relationships. Do you risk damaging that relationship? Is there a willingness to litigate?”

Jack Browne, then president and CEO of MIPS Technologies, put it more starkly: “You do have to be prepared for thermonuclear warfare when you decide to go to litigation.”

As companies get bounced out of markets in which they used to compete aggressively, more will be tempted to pursue the Rodime option and use the patent collection they built up. As chipmaking involves a complex web of IP, no-one will be immune to the potential of patent suits. And, because those companies have left the market, the threat of mutually assured destruction will not bring the traditional solution: a big bag of cross-licensed patents.

Micron will pay using shares – there is no cash in this deal. "We are not leveraging the balance sheet to do this acquisition," boasted Micron CEO Steve Appleton in a conference call with analysts last night, shortly after all the parties to the deal managed to reach an agreement. Appleton apologised for the lateness of the call but said he wanted to get the news out as quickly as possible. "It is a really solid way to add to the company in a variety of ways."

One change is the merging of HardCopy - the mask-programmed gate array used to provide fixed versions of customer design for less money per die - with the mainstream programmable logic family of Stratix parts. Another is the decision to finally adopt partial reconfiguration so that parts of the logic can be switched in and out while the rest of the system is still running.

"Partial reconfiguration has been around for a long time," said David Greenfield, senior director of Altera's HardCopy business unit. "But this is a fairly significant shift for Altera."

At the recent IP-ESC conference in Grenoble, some old favourites from the early days came back with a vengeance, such as the perennial favourite, IP quality. The system-on-chip (SoC) industry has, on the one hand, dealt reasonably well with the quality issue. And IP is now a core part of SoC design. It's hard to think of any SoC on the market that does not incorporate a hardware block bought from somewhere else.

STMicrolectronics has even formed its own internal IP suppliers. "We separated the SoC team from the IP team," said Francois Remond of ST, primarily to make the IP more robust. A danger with reusing blocks that were never designed for the purpose is that shortcuts taken on the original project don't show until too late on subsequent designs.

"We had recently the experience of transforming an adult RTL block [developed internally] into IP. It has a high cost," said Remond. "It is better to start with reuse in mind."

It’s a testament to the rise of consumer electronics as a proportion of the overall semiconductor business that the market is now so seasonal. “Q1 is the decision time for companies developing new products,” Srodzinski explained. “That is when they are going to be looking at new components.”

Making the selection in Q1 gives the companies approximately six months to get a new system into the market – in time for Christmas and the Chinese New Year in the following Q1. “Christmas drives the cyclical nature of the industry,” he said. “Miss the Q1 slot and you miss the market for that product completely. After that, they will be concentrating on the actual design. You are in with a small chance during Q2 but you won’t get into production with anyone in Q3.”

“We are focused on RF semiconductors, initially on the broadcast TV and radio space. We are concentrating very much on high-end RF,” said Srodzinski.

Formed in 2003, the company is aiming for the time when radios go soft: using signal processing to let the same receiver module deal with practically any frequency, possibly as far as 10GHz. “We believe that every radio will be made configurable. And we believe that the receiver can be pushed all the way up there,” he added. “But that’s a big challenge for a start-up to take on. We needed to focus the company as we go to a higher revenue stage. So, we are initially focused on the TV tuner market.”