Recently in Design Category

A column in PC World on the launch of nVidia’s Next-Generation Ion (or Ion2 as a lot of people call it) decries the way that the graphics processor (GPU) company has backed away from Ion being a ‘platform’ into just being an additional chip for Intel’s own Atom chipset. There isn’t a whole lot that nVidia can do about that. Welcome to the land of disappearing sockets.

While people speculate on why Intel and TSMC have so far failed to get anyone into production with an Atom system-on-chip (SoC), the one company with a real reason for licensing the processor core finds its latest creation dangling off the end of a PCI Express bus provided by Intel’s Pine Trail chipset.

When Intel launched the first generation of Atom, it was a tiny sliver of silicon that relied entirely on other chips to control a PC. Although you pretty much had to buy the Atom with its support chips from Intel, nVidia encouraged PC makers to dispense with the standard chipset and replace it with the Ion and its built-in graphics.

With Pine Trail, Intel decided to move its own GPU and main memory controller into the Atom processor itself and sell a smaller peripheral controller ‘South Bridge’ device, leaving nVidia with far less scope to have an influence on what an Atom-based PC would look like inside.

I think the only sane advice I could give anyone on whether to start up a programmable-logic company today is: “I wouldn’t start from here if I were you.”

Perhaps the best response is to come up with what is, at first glance, the most insane architecture I’ve ever seen. Even its creator concedes that your best bet is not to think to what’s going inside because it gets too hard to conceptualise. Even the tools that build the design on Tabula’s architecture don’t deal directly with what happens inside the device.

Tabula is president and CTO Steve Teig’s fifth startup. Two were in electronic design automation (EDA) — the most recent being Simplex Solutions, which sold to Cadence Design Systems — and two in biotechnology. Even he spent a while, after leaving Cadence in 2003, wondering whether starting an FPGA company was a wise move considering the trail of dead companies that has formed in the wake of Xilinx’ and Altera’s dominance of the market since the early 1990s.

The company’s CEO, Dennis Segers, was responsible for the Virtex architecture at Xilinx — the company’s top-selling family of FPGAs — and was the man venture capitalists hauled in whenever they had a potential investment in an FPGA startup to make. And those VCs have not been short of choice in the past decade. Neither have they done very well out of it. Segers didn’t rate any of them.

At the company’s executive forum held in Yokohama, Japan, TSMC’s senior vice president of R&D, Shang-yi Chiang, provided some background on why yield problems surfaced on the 40nm process — and also some indications that 28nm will not exactly be plain sailing.

Chiang pointed to the shift to immersion lithography — a choice that Intel delayed by a generation — and the use of a new low-k dielectric in the metal layers as the main culprits for the foundry’s problems. He claimed that defect density has reduced significantly since the middle of last year, when chairman Morris Chang decided to expand the team working on 40nm at TSMC.

Chiang said the move from 90nm to 65nm was comparatively simple and the relative cost quite low. “Moving to 45 and 40nm is a lot more challenging,” he said. “This is the first time we began to use 193nm immersion [lithography]. This means the photoresist during exposure is submerged in water and [presents] a very high potential defect [density].”

The low-k dielectric, with a dielectric constant 2.5, was also more fragile than its predecessor. It seems that 40nm was a partial rerun of the 130nm introduction when chipmakers discovered that soft dielectrics and packaging machinery are not the best of mates — the pressure needed to seal the package crushed the metal interconnect.