Fabless: July 2009 Archives


As the Big Four pure-play foundries have now published their results for the second quarter of 2009 and their numbers have recovered substantially, now seems a good time to look at what's happened over the past couple of years. Rather than look at their overall sales, I've focused on the main process technologies that they are now running.

The four charts above are all sized so that you can compare how the foundries are doing on what are the most important processes for them. The ones that are missing are the older 0.25µm and larger geometries. However, compared with the total sales of foundries, these are fairly small beer.

SMIC does not yet have 65nm running in volume, although it is working on introducing a 45nm process licensed from IBM. But TSMC, UMC and Chartered now have had 65nm running for some time. I haven't included 45nm as TSMC only shipped $20m worth of wafers last quarter and no-one else has their process running yet. What's interesting about these graphs is the way that the processes each do about $1bn a quarter. Bear in mind this is revenue for each process rather than numbers of wafers, so the Big Four will be shipping way more 200mm-equivalent wafers of 180nm than they will of 65nm.

Although the share will get bigger as integrated device manufacturers (IDMs) look more closely at their operations, there is a glass ceiling on how much the foundries can make from a given process. Beyond that, it becomes worth customers operating their own fabs and taking the margin they would otherwise pay to foundries. This is why TSMC is arguably going to do better at taking processes over from small, relatively uneconomic fabs than trying to take business from IDMs with larger 200mm fabs. However, there are more players able to supply parts based on older processes, which will help depress wafer prices.


The second pair of graphs look at wafers shipped per quarter in 200mm-equivalents together with revenue per wafer shipped. Although wafer numbers have recovered, pricing has taken a hammering, particularly for TSMC. This does not seem to be down to a change in mix, at least not significantly. However, Chartered seems to have done rather better in relative terms than the others, largely due to its ability to bring on a reasonable amount of 65nm capacity, although nothing like the quantity that TSMC has.

The Common Platform deal seems to be working out well for the foundry, although it has encountered problems actually making money over the long-term. With 45nm in development and 32nm around the corner, Chartered could benefit from TSMC's hiccup on 40nm yields. And it's double bad news for UMC which, although it has had 65nm running in production since mid-2007, missed out on the lead that TSMC and then Chartered managed to establish.

Morris Chang, chairman and CEO of TSMC, reckons more than 20 fabs will close this year. And more could easily follow as older fabs become uncompetitive against newer, particularly 200mm lines.

Chang plans to help the process along by essentially doing the foundry equivalent of a carve-out on chipmaking operations run by integrated device manufacturers (IDMs).

"We plan to take full advantage of this opportunity and we are participating in active discussions with some of the IDMs in helping them to close their fabs and transfer the fab business to us," Chang claimed in a conference call with analysts today.

Rather than take the fabs themselves over from integrated device manufacturers (IDMs) - which would probably be uneconomic - his plan is to transfer the custom bits of the processes to TSMC where they can be added as modules to its existing lines. In this way, the former foundry owner gets to keep having parts made for it without the capital expenditure needed to keep an entire fab opened.

"We are committing considerable resources to our R&D to support the development of the relevant technologies that will be needed by those IDM customers that are planning to close their fabs," Chang explained.

The plan is not going to make TSMC rich(er) overnight. Chang himself explained on a conference call to analysts: "I would not consider them a big deal because most of them are mid-szied to small and some are even 6in fabs."

"Some are very small indeed," he added. So, production for those customers will not greatly add to the 2.5 million wafers that get shipped out of TSMC even quarter.

"They are not a big deal in terms of the total foundry business. But they will be important for mature technologies, the legacy-technology part of the foundry business," Chang noted.

Proportion of revenue from IDMs at TSMC and UMC By committing R&D to possibly exotic processes, it demonstrates that TSMC is still very keen to capture business from IDMs - business that the company has been losing since the end of 2007. In times of recession, you would expect the IDMs to pull production back: they have their own fabs to fill. However, production for IDMs at TSMC has been slipping since mid-2007 and, unlike number-two foundry UMC, the share from IDMs did not improve in the quarter just completed, a time when customers are looking to restock after having run inventory to the bare minimum.

Fabless companies will remain the mainstay of all foundries but the IDMs are important for a company that wants to maintain a clear lead over the competition. TSMC still dominates the landscape, with more than double the revenues of UMC.

Another source of expansion is what former CEO Rick Tsai is exploring. He is responsible for looking for new areas of business, something that Tsai helped drive with a push into high-voltage and ultra-low power 180nm and 130nm processes. The two main areas of interest right now are solar panels and LEDs, with much of the emphasis going on solar power. Chang said he has agreed to Tsai's request for $50m in capital spending to kick-start the initiative, although this has not received board approval yet.

With Morris Chang back in the CEO seat, it was a different kind of Taiwan Semiconductor (TSMC) that you could hear on the second quarter 2009 results conference call today. Analyst questions actually got some answers for a change, not least a hint as to which way TSMC plans to go with the high-k, metal-gate process for the future 28nm node.

The company will be taking the same route as Intel and UMC with a so-called gate-last process, not the gate-first approach favoured by IBM and the Common Platform partners. However, that answer from senior director of advanced process technologies Mark Liu did not arrive without a little prodding from his boss. It's hard to imagine former CEO - and now man in charge of finding new markets at TSMC - Rick Tsai making sure Liu answered the question.

Liu's answer to Daiwa Securities' Pranab Sharm about what was different to the Common Platform plan actually started out as: "We think our technology is competitive with IBM's tech but most importantly the 32nm customers are already engaged and designs are already ongong. On 28nm high-k metalgate we have ten customers already engaged. We expect that for customer engagments we are on the same track...the right track."

Chang cut in: "I think he is asking..."

We then found out: "Yes we have a different architecture in terms of gate-first and gate-last..."

Sharma had another go: "Are you going to use both or one? Are you going to use the gate-first or gate-last?"

"We will be using gate-last," admitted Liu.

Liu was there not so much to talk about the 32nm and 28nm processes which look to have slipped by about a quarter in terms of when they get underway, but the problems with yield that are rumoured to have tripped up nVidia.

Liu started off by claiming that the average yield has roughly doubled within the past three months since the primary causes of failure emerged. In the previous conference call in April, Tsai confessed that the foundry had problems with 40nm but claimed that the root cause of the problem had been found.

Liu cited two materials changes, including the use of silicon germanium to strain the silicon layers, and a move to immersion lithography contributed to problems with defects, as being responsible for being a tougher step than the shift to 65nm, which only involved a change in lithography. “We encountered major issues,” he said.

Liu explained the major problem with yield lay in the stress layers produced by adding different amounts of silicon germanium.

Several senior R&D directors – two experts on process modules and one on integration – were drafted in to work on the problem during the past quarter. Morris Chang, the chairman who has stepped in as CEO since Q1, added later that R&D spend has been increased to put more effort into work on advanced processes. “If we had not increased our R&D resources, that kind of help would have been very difficult to come by,” Chang claimed.

Previously, TSMC has been running with a long-term R&D spend of around 6-7 per cent of revenue. This has gone up to 7.8 per cent, said Chang, admitting that the actual spend was not that big because of the drop in 2009 revenues but insisted that between 7 per cent and 8 per cent would be the long-term average. He does not want the 28nm ramp-up to provide the company with another banana skin to slip on and it marks one of the differences in TSMC's approach since Chang took over as CEO.

"It would be incorrect to say that I have new strategies. Even as chairman I had a hand in the strategy of the company. What is new is that I now have the opportunity and first-hand responsibility to push my thinking and my strategy vigourously," said Chang.

The shift in R&D spending is one sign of that. Another is a long-term plan that sounds slightly strange in the context of the foundry business: to not run at maximum capacity. For close to 18 months ahead of the current recession, TSMC was operating at close to 100 per cent utilisation or even higher (you can do that by dedicating a little less time to maintenance). This very high utilisation proved a turn-off to the bigger customers who went and looked for secondary suppliers, just in case TSMC turned round one day and said: "No more wafers for a while."

So, the plan is to have TSMC operate at 95 per cent utilisation or less, once things return to normal, so as not to scare too many customers into seeking dual-source arrangements. This, Chang claimed, will help maintain per-wafer pricing at levels TSMC wants.

On the 40nm process, Liu said the foundry is attempting to ramp-up yield through the summer. “We have several activities in place to move the yield forward. We expect the defect density reduction will continue through September.”

Chang admitted that the yield problems reduced the profitability of the 40nm process. “The profitability is not nearly as good as that on 65nm or the other nodes. But we do expect that when the yields improve along the experience curve that we have seen for every other node in the past then I think 40nm profitability will be going up to the standard that we expect.”

This morning, as its new customer was talking about Q2 results, Globalfoundries said STMicroelectronics has decided to shift some production to its Dresden fab. ST, a big customer of number-one foundry TSMC, will use the foundry spin-off from AMD to make chips based on a 40nm bulk-silicon process from next year.

As the deal is with ST rather than the 50/50 joint venture ST-Ericsson, it is possible that the Franco-Italian company will use Globalfoundries for consumer-product devices such as settop-box chips rather than the larger business of cellular handset integrated circuits (IC). But because of the way that ST consolidates results from ST-Ericsson, handset devices may also be covered in the deal. However, with 32nm and 28nm processes coming, advanced handset devices seem likely to stay with TSMC. Even so, coming on the day before the foundry discloses its own Q2 results, it's a headache for TSMC. Deals like this are perhaps one reason why Morris Chang decided to shift Rick Tsai aside and take over as CEO of TSMC as well as chairman.

Although TSMC is the runaway market leader in foundry services right now, the company has the problem of maintaining market share when new players are coming into the business and who can use shared R&D costs to play catch-up. It is somewhat ironic that TSMC CTO Fu-Chieh Hsu used his keynote at the Design Automation Conference yesterday to eulogise collaborative working in chipmaking when the threat to the foundry's business comes from exactly that model.

TSMC does a bit of collaborative process research but not at the same scale as IBM and the Common Platform. For years, Common Platform did not look that much of a threat. IBM and Chartered Semiconductor Manufacturing had reasonable chunks of business but nothing approaching what TSMC and UMC could claim. Then Samsung came onto the scene, with a dedicated fab for foundry services, followed by Globalfoundries. And on the sidelines, Chinese foundry SMIC has licensed process technology from IBM.

In truth, integrated device manufacturers (IDMs) such as ST were always going to be the least loyal of its customers. They can afford to have people thrash out process problems on site and, moving to Dresden, ST obtains the advantage of having its major design groups in the same timezone as the fab. That will make it easier to have people onsite and debug process problems. ST is also the kind of customer that can get attention from Globalfoundries when a lot of its time will spent working on AMD's issues. Most fabless companies are not in that kind of position.

But as the IDMs look for cheaper wafers, they will cheerfully take advantage of the commonality of processes that Common Platform offers - it is one reason why Chang has been keen to explain to customers that TSMC will work with them on customised process technologies - and those negotiations will naturally depress the price that TSMC can charge for its own wafers.

Synopsys has joined ARM, IBM, Chartered Semiconductor and Samsung in a programme intended to get the 32nm Common Platform off to a running start. The EDA company will use the Lynx design environment that it built in the past few years to hook together a ready-made flow that will act as the gateway to production at the Common Platform foundries. ARM, naturally, will supply libraries and IP cores that have been tried out on test chips.

By providing a ready-made environment, the aim is to pull customers into 32nm design much more quickly than they might have without having this kind of support, according to Kevin Meyer, vice president of marketing at Chartered. "We believe customers can come to this technology a full year earlier," he claimed.

IBM is placing a bet that 32nm will provide the breakthrough for Common Platform. The shift to a high-k, metal-gate transistor may provide the technical advantage that Common Platform needs over TSMC, the current leader in foundry production. TSMC plans to bring in a 28nm process with a high-k, metal-gate but IBM has a little more experience in that department having worked on it for an internal 45nm process, although that never saw the light of day as a Common Platform-supported process.

The 32nm node could prove to be an important one, much like 130nm or 65nm are today. Mark Ireland, vice president at IBM Semiconductor Platforms, said companies are increasingly skipping nodes.

The conclusion is that they are more likely to skip from 65nm to 32nm for a density increase rather than to 45nm or 40nm. There are some doubts as to how easy it will be to move to 22nm if some techniques to produce accurate images on the chips do not work.

"From what we have seen, 32nm will be a very long lived node. There is a lot of excitement about it and a lot of companies will be skipping to 32nm," Ireland claimed.

The rise of chip design in Asia is playing a large role in the decision to roll out this kind of environment. Meyer pointed to the large number of 65nm designs being done now in the Far East. China is picking up steam in this department, partly helped by attractive subsidies for companies to perform advanced designs in that country. This has encouraged companies that used to buy off-the-shelf chips to do their own and push towards the advanced nodes to get the per-die price down.

Normally, EDA companies hang back from doing this kind of advanced work. It's generally better to see the colour of the customer's money before ploughing in a lot of development. John Chilton, senior vice president of marketing at Synopsys refused to discuss the commercial arrangement that brought the company into the Common Platform fold. But it is interesting that there is only one EDA company there - TSMC has been very careful to maintain neutrality when dealing with the major EDA companies when putting together its reference flows.

Driving demand is very important for the foundries - this deal provides a way of easing access to what will be a tricky process to design for. But the commercial arrangements will be very sensitive. ARM is in a pitched battle with Intel to provide the dominant architecture for mobile Internet devices, exactly the target for the 32nm and 28nm Common Platform processes. The Common Platform axis has aligned itself around ARM and its IP - TSMC is the foundry of choice for Intel Atoms. But Synopsys is the 'official' primary tool supplier to Intel as well as for this programme. Or was that the former primary tool supplier to Intel?