Mentor joins French chip programme


crolles-cleanroom.jpgSTMicrolectronics has recruited US-based EDA company Mentor Graphics to a French R&D programme as part of a plan to have processes down to 20nm running at Crolles by the time the programme finishes in three years.

The Nano2012 programme originally included just ST and its fab at Crolles and the CEA-Leti research institute based nearby in Grenoble. But, with ST having joined the IBM alliance of companies developing sub-45nm processes, the Nano2012 programme has become more international in scope. IBM joined the team with Dutch lithography equipment maker ASML also opting to become part of the programme.

On the conference call to discuss the deal, Mentor president Greg Hinckley was keen to stress the company’s French credentials. The EDA vendor has more than 100 engineers based in the country and will recruit a further 20 to work on the DeCADE project that forms part of the Nano2012 programme. But the deal means a bit more than R&D jobs in France.

The project will include the development of a 28nm chip within two years that will be made at Crolles. By joining the programme, Hinckley said Mentor will have unprecedented access to real-world issues in design with advanced processes. It provides “an opportunity to try out ideas and algorithms”, Hinckley said. “Mentor will be able to immediately validate EDA techniques for 28nm and below and critical, adjacent technologies such as mixed-signal, RF and 3D packaging.”

If a 28nm chip in two years from now sounds a bit late for a research project — given that the first 28nm processes should be moving into risk production real soon now — Philippe Magarshack, group vice president of ST’s central R&D group, explained that the chip is mainly to establish manufacturing for 28nm-class devices at Crolles.

Magarshack said the company has produced working silicon on the prototype 28nm process at IBM’s fab in East Fishkill with the aim of having devices produced by foundries once that generation is up and running.

“We plan to tape out at the end of this year with one of the [IBM] alliance partners,” said Magarshack. “But our company has decided to be able to do volume production inhouse. We will demonstrate the fab capability of ST in 2012 at a time where we believe there will be volume production of the 28nm node.”

Mentor already has joint development project underway with IBM that is looking at techniques such as computational lithography — effectively changing the shape of the light beam used to draw features on a chip to improve its effective resolution.

“We would be expecting to bring some aspects of that into our joint programme with ST,” said Hinckley. “More than that I can’t disclose today.”