TSMC pulls the big switch at IEDM


TSMC pulled a switcheroo at the International Electron Device Meeting (IEDM) in a further piece of technology oneupmanship following on from its claim of an early move to 28nm earlier in the autumn.

Director of advanced process development Carlos Diaz was scheduled to talk about the company's 32nm high-k, metal-gate process - one that does not actually appear on TSMC's official roadmap now that 28nm has supposedly taken over. The official proceedings are all about the 32nm process. But when Diaz took to the stage, it was a different story: he was there to describe what the company had done with its 28nm process.

This time, there was to be no confusion similar to what happened with the 45nm process where, by the time TSMC launched it commercially, it had transmuted into a 40nm. This 28nm process has different measurements.

Now, is it really a 28nm process? It depends on how you look at it. I think Kaizad Mistry of Intel was right last year when he said contacted gate pitch is the critical measurement that determines how dense a process can be. And density is the reason why people move to more advanced processes. But, you could also argue that SRAM cell size is just as important, especially now that most chips have big banks of the memory on-chip.

If you look at contacted gate pitch, then what TSMC calls a 28nm process would be a 32nm process at Intel. Diaz reported a pitch of 117nm at IEDM on Wednesday. Intel's late paper on its 32nm process came in with a figure of 112.5nm.

Intel, however, has been more conservative with the SRAM cell the company proposed. However, there is a fair amount of latitude in this metric as there is a clear trade-off between size and noise. The smaller they get, the more noise you see in the SRAM circuits. Too much noise and the circuits begin to fail. TSMC pushed to get a cell that measures 0.13µm2. Intel was happy with 0.17µm2

It was a similar story last year in the duel over 45nm, where TSMC showed a smaller SRAM cell but its gate pitch was not as tight as Intel's. This time around, TSMC wants to demonstrate that it has a disinct 28nm process but there is still a question mark over whether this 28nm is not simply a tight 32nm.