And for those who really want a metal gate...

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Reporting from TSMC's technology symposium in California this week, Mark LaPedus of EETimes reports that the foundry is planning to introduce a high-k/metal-gate option with its 32nm process. However, it will be aimed at higher-performance designs: the low-power process, which is likely to be the mainstream option, will remain based on a conventional polysilicon gate. It's worth noting that TSMC considered high-k and metal gates for its 45nm process as an option, then opted to concentrated on a polysilicon gate. On the 32nm process, the metal gate will let TSMC get faster transistors without pushing leakage current through the roof. There are very few details on what TSMC is doing, but it seems likely that it will be a single-metal process - and probably not the same as IBM's take on this technology. A joint research project between NXP Semiconductors and TSMC based at the IMEC research centre in Belgium has been working on an approach that uses dysprosium oxide to act as a dielectric and a way of tuning a single metal, such as titanium, to work with the two types of gate needed on a CMOS process. There is no news on when the higher-performance process might arrive. Based on the experience with previous nodes, it is likely to be later than the low-power version.